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LP3982
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General Description
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Features
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Applications
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Application Circuit
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Absolute Maximum Ratings
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Operating Ratings,
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Electrical Characteristics
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Functional Block Diagram
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Typical Performance Characteristics
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Application Information
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GENERAL INFORMATION
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FIGURE 1. Functional Block Diagram for the LP3982
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OUTPUT VOLTAGE SETTING (ADJ VERSION ONLY)
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FIGURE 2. Regulator Topology Simplified
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OUTPUT CAPACITANCE
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FIGURE 3. Simplified Model of Regulator Loop Gain Components
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FIGURE 4. Loop Gain Bode Plot Illustrating Inadequately High Zero for
Stability Compensation
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NO-LOAD STABILITY
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INPUT CAPACITOR
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NOISE BYPASS CAPACITOR
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POWER DISSIPATION
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FAULT DETECTION
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FIGURE 5. Power on Delayed Reset Application
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SHUTDOWN
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FIGURE 6. Minimum Battery Detector that Disconnects the Load Via the
SHDN Pin of the LP3982
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FAST START-UP
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Connection Diagrams
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Ordering Information
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Physical Dimensions
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National Semiconductor is now part of
Texas Instruments.
Search http://www.ti.com/ for the latest technical
information and details on our current products and services.

LP3982
Micropower, Ultra Low-Dropout, Low-Noise, 300mA
CMOS Regulator
General Description
The LP3982 low-dropout (LDO) CMOS linear regulator is
available in 1.8V, 2.5V, 2.77V, 2.82V, 3.0V, 3.3V, and adjust-
able versions. They deliver 300mA of output current. Pack-
aged in an 8-Pin MSOP, the LP3982 is pin and package
compatible with Maxim’s MAX8860. The LM3982 is also
available in the small footprint LLP package.
The LP3982 suits battery powered applications because of
its shutdown mode (1nA typ), low quiescent current (90μA
typ), and LDO voltage (120mV typ). The low dropout voltage
allows for more utilization of a battery’s available energy by
operating closer to its end-of-life voltage. The LP3982’s
PMOS output transistor consumes relatively no drive current
compared to PNP LDO regulators.
This PMOS regulator is stable with small ceramic capacitive
loads (2.2μF typ).
These devices also include regulation fault detection, a
bandgap voltage reference, constant current limiting and
thermal overload protection.
Features
n MAX8860 pin, package and spec. compatible
n LLP space saving package
n 300mA guaranteed output current
n 120mV typical dropout @ 300mA
n 90μA typical quiescent current
n 1nA typical shutdown mode
n 60dB typical PSRR
n 2.5V to 6V input range
n 120μs typical turn-on time
n Stable with small ceramic output capacitors
n 37μV RMS output voltage noise (10Hz to 100kHz)
n Over temperature/over current protection
n ± 2% output voltage tolerance
Applications
n Wireless handsets
n DSP core power
n Battery powered electronics
n Portable information appliances
Application Circuit
20036931
March 2006
LP3982 Micropower, Ultra Low-Dropout, Low-Noise, 300mA CMOS Regulator
© 2006 National Semiconductor Corporation DS200369 www.national.com

Absolute Maximum Ratings (Notes 1, 2)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
V IN, V OUT, V SHDN, V SET, V CC,
V FAULT −0.3V to 6.5V
Fault Sink Current 20mA
Power Dissipation (Note 3)
Storage Temperature Range −65 ̊C to 160 ̊C
Junction Temperature (T J) 150 ̊C
Lead Temperature (10 sec.) 260 ̊C
ESD Rating
Human Body Model (Note 6) 2kV
Machine Model 200V
Thermal Resistance (θJA)
8-Pin MSOP 223 ̊C/W
8-Pin LLP (Note 3)
Operating Ratings(Note 1), (Note 2)
Temperature Range −40 ̊C to 85 ̊C
Supply Voltage 2.5V to 6.0V
Electrical Characteristics
Unless otherwise specified, all limits guaranteed for V IN = V O +0.5V (Note 7), V SHDN = V IN, C IN = C OUT = 2.2μF, C CC = 33nF,
T J = 25 ̊C. Boldface limits apply for the operating temperature extremes: −40 ̊C and 85 ̊C.
Symbol Parameter Conditions Min
(Note 5)
Typ
(Note 4)
Max
(Note 5)
Units
V IN Input Voltage 2.5 6.0 V
∆V O Output Voltage Tolerance 100μA ≤ IOUT ≤ 300mA
V IN = V O +0.5V, (Note 7)
SET = OUT for the Adjust
Versions
−2 +2
% of
VOUT (NOM)−3 +3
V O Output Adjust Range Adjust Version Only 1.25 6 V
I O Maximum Output Current Average DC Current Rating 300 mA
I LIMIT Output Current Limit 330 770 mA
I Q Supply Current I OUT = 0mA 90 270 μA
IOUT = 300mA 225
Shutdown Supply Current V O = 0V, SHDN = GND 0.001 1 μA
V DO Dropout Voltage
(Note 7), (Note 8)
IOUT = 1mA 0.4
mVIOUT = 200mA 80 220
IOUT = 300mA 120
∆V O Line Regulation I OUT = 1mA, (V O + 0.5V) ≤ V I ≤ 6V
(Note 7)
−0.1 0.01 0.1 %/V
Load Regulation 100μA ≤ I OUT ≤ 300mA 0.002 %/mA
e n Output Voltage Noise I OUT = 10mA, 10Hz ≤ f ≤ 100kHz 37 μVRMS
Output Voltage Noise Density 10Hz ≤ f ≤ 100kHz, C OUT = 10μF 190 nV/
V SHDN SHDN Input Threshold V IH, (V O + 0.5V) ≤ V I ≤ 6V
(Note 7)
2
V
V IL, (V O + 0.5V) ≤ V I ≤ 6V
(Note 7)
0.4
I SHDN SHDN Input Bias Current SHDN = GND or IN 0.1 100 nA
I SET SET Input Leakage SET = 1.3V, Adjust Version Only
(Note 9)
0.1 2.5 nA
V FAULT FAULTDetection Voltage V O ≥ 2.5V, I OUT = 200mA
(Note 10)
120 280 mV
FAULT Output Low Voltage I SINK = 2mA 0.115 0.25 V
IFAULT FAULT Off-Leakage Current FAULT = 3.6V, SHDN = 0V 0.1 100 nA
T SD Thermal Shutdown
Temperature
160
 ̊C
Thermal Shutdown Hysteresis 10
T ON Start-Up Time C OUT = 10μF, V O at 90% of Final
Value
120 μs
Note 1: Absolute Maximum ratings indicate limits beyond which damage may occur. Electrical specifications do not apply when operating the device outside of its
rated operating conditions.
LP3982
www.national.com 2
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